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Silicon Labs /BGM210LA22JNF /HFRCO0_S /CAL

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Interpret as CAL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TUNING0FINETUNING0 (LDOHP)LDOHP 0FREQRANGE0CMPBIAS 0 (DIV1)CLKDIV 0CMPSEL 0IREFTC

CLKDIV=DIV1

Description

No Description

Fields

TUNING

Tuning Value
FINETUNING

Fine Tuning Value
LDOHP

LDO High Power Mode
FREQRANGE

Frequency Range
CMPBIAS

Comparator Bias Current
CLKDIV

Locally Divide HFRCO Clock Output

0 (DIV1): Divide by 1.

1 (DIV2): Divide by 2.

2 (DIV4): Divide by 4.
CMPSEL

Comparator Load Select
IREFTC

Tempco Trim on Comparator Current

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data